Semiconductor Manufacturing Equipment: The Capital-Intensive Backbone of the Compute Supercycle

Every AI accelerator, every high-bandwidth memory stack, and every advanced logic die begins its life inside a machine that can cost more than a wide-body aircraft. Semiconductor manufacturing equipment is the least visible and most concentrated layer of the compute economy, and it is currently absorbing capital at a pace the industry has never seen. For executives whose businesses depend on compute availability, component pricing, or industrial supply chains, the equipment market is no longer a niche technical subject. It is a leading indicator of the entire digital economy.

A Market Setting Records in Three Consecutive Years

The scale of the current cycle is best captured by the industry’s own transaction data. Global equipment billings reached USD 130 billion in 2025, up 15% year on year. Momentum has carried into this year where first-quarter 2026 billings hit a quarterly record of USD 36.5 billion, up 14% year on year, driven by capacity expansion and technology upgrades in leading-edge logic, DRAM, and advanced packaging.

Within that total, wafer fab equipment remains the dominant segment, projected to reach over USD 130 billion by 2027, while back-end categories are growing from a smaller base at a faster clip i.e. test equipment sales surged 48% in 2025 to over USD 11 billion, and assembly and packaging equipment rose nearly 20% to USD 6.5 billion.

Total OEM equipment sales (USD billions)

The composition of demand is as important as its size. Investment is increasingly concentrated at the leading edge, where the industry is moving to high-volume manufacturing at the 2-nanometre gate-all-around node, and in memory, where DRAM equipment sales rose 15% in 2025 to USD 22.5 billion on the back of high-bandwidth memory demand. Mainstream consumer, automotive, and industrial segments remain comparatively soft, a divergence that matters greatly for equipment makers with different segment exposures.

The Demand Engine: AI Compute and the Economics of Scarcity

The proximate cause of the supercycle is straightforward: demand for AI compute is outrunning the world’s ability to manufacture it. TSMC, the bellwether for the entire equipment ecosystem, reported first-quarter 2026 revenue growth of roughly 35% year on year and has publicly indicated that even its largest customers cannot be allocated all the leading-edge capacity they request. High-performance computing now accounts for well over half of TSMC’s revenue, and management projects AI-related revenue to grow more than 50% annually through the end of the decade.

That demand translates directly into equipment orders. ASML, the sole supplier of extreme ultraviolet lithography systems, closed 2025 with total net sales of €32.7 billion, a record fourth-quarter order intake of €13.2 billion, and a backlog of €38.8 billion, equivalent to roughly two years of revenue visibility. In April 2026 the company raised its full-year sales guidance to between €36 billion and €40 billion, citing customers accelerating their capacity plans, and reiterated a 2030 revenue opportunity of €44 billion to €60 billion. EUV systems alone contributed €4.1 billion of first-quarter system sales, up 28% year on year, including revenue from the first High-NA systems entering customer fabs.

Applied Materials reported record quarterly revenue of USD 7.91 billion in its second fiscal quarter of 2026 and now expects its semiconductor equipment business to grow more than 30% in calendar 2026. Tokyo Electron has likewise raised its full-year profit forecast on the strength of AI-related tool demand, and KLA has set a public ambition of USD 26 billion in revenue by 2030 anchored in its leadership of process control.

Reshoring and the New Geography of Fabrication

The second structural force behind the equipment supercycle is geographic. Governments in United States, Europe, Japan, and India have concluded that advanced semiconductor manufacturing is strategic infrastructure and are subsidizing its relocation at historic scale. The consequence is that a given unit of chip demand now generates more equipment demand than it did a decade ago, because capacity is being duplicated across regions rather than concentrated where it is cheapest.

The CHIPS and Science Act appropriated USD 52.7 billion for domestic semiconductor manufacturing and research, with more than USD 33 billion in direct incentives awarded, the largest going to TSMC, Intel, Samsung, and Micron. As of mid-2026, three major CHIPS-funded logic fabs are in volume production: TSMC’s Fab 21 Phase 1 in Arizona, Intel’s first Ohio module on its 18A process, and Samsung’s Taylor, Texas fab on 3-nanometre gate-all-around technology. A further twelve funded fab projects are under construction with production dates staggered through 2029. U.S. share of advanced logic manufacturing has risen from nearly 12 percent in 2020 to roughly 22% in 2026.

U.S. Share of Global Advanced Logic Manufacturing Capacity

The scale of the private commitments dwarfs the subsidies themselves. TSMC has committed USD 165 billion to its Arizona campus, with plans reported to encompass up to six wafer fabs and multiple advanced packaging facilities; equipment installation for its second Arizona fab begins in the third quarter of 2026, with 3-nanometre production pulled forward a full year to 2027 on AI customer demand. Micron broke ground in January 2026 on its USD 100 billion memory megafab in Clay, New York, part of a USD 200 billion U.S. expansion programme spanning Idaho, New York, and Virginia. Under the January 2026 U.S.–Taiwan trade and investment agreement, Taiwanese semiconductor and technology firms committed at least USD 250 billion in new direct U.S. investment. Every one of these projects is, at its core, a purchase order pipeline for the equipment industry.

US-based wafers cost an estimated 20 to 30% more than equivalent Taiwanese production once construction, labour, and ecosystem costs are counted. Boards funding these projects are explicitly paying for resilience rather than unit economics, and equipment suppliers, installation contractors, and materials providers are the beneficiaries of that insurance premium.

Capital Intensity

Underneath the demand and policy stories sits a quieter driver: the physics of advanced manufacturing is making each increment of capacity more expensive. TSMC’s chief financial officer has noted that the capital cost of building 1,000 wafers per month of 2-nanometre capacity is substantially higher than the equivalent at 3 nanometres, and that the next A14 generation will be higher still. The company has guided 2026 capital expenditure to between USD 52 billion and USD 56 billion, now trending toward the upper end, against USD 40.9 billion in 2025 and USD 29.8 billion in 2024. Roughly 70 to 80 percent is allocated to advanced process technologies and 10 to 20 percent to advanced packaging.

TSMC Capital Expenditure, 2024–2026

Multiply this dynamic across Samsung, SK hynix, Micron, Intel, and a long tail of specialty and mature-node manufacturers, and the equipment market’s trajectory becomes legible. Capital intensity is not a temporary artefact of the AI boom; it is the compounding cost of extending Moore’s Law through gate-all-around transistors, backside power delivery, high-NA lithography, and three-dimensional integration. Each of those transitions creates new tool categories, new process steps, and new service revenue for the equipment ecosystem.

Strategic Activity: M&A, Alliances, and the Race for Advanced Packaging

Corporate activity in the sector has accelerated in step with the cycle, and the pattern of recent transactions reveals where equipment executives believe the next decade of value lies at the boundary between the front end and the back end of the manufacturing process.

Three themes stand out:

• • • First, advanced packaging has moved from the periphery to the center of strategy. As traditional transistor scaling slows, performance gains increasingly come from stacking and connecting chiplets, which is why hybrid bonding capability is attracting takeover interest from the industry’s largest players.
    • Second, front-end and back-end are converging where packaging now requires cleanroom conditions, planarization, and deposition steps historically confined to wafer fabs, which advantages broad-portfolio toolmakers.
    • Third, technology development is being pursued through minority stakes, joint development agreements, and ecosystem platforms as much as through outright acquisition, a pragmatic response to regulatory scrutiny of consolidation in a sector this concentrated.

Competitive pressure is also emerging from new directions. Chinese domestic equipment makers such as NAURA and AMEC continue to scale with state support in their home market, while Japanese and European suppliers benefit from regional incentive programmes. For incumbents, the strategic question is no longer only share of the leading edge but position across an increasingly regionalized, politically shaped demand map.

The Risk Ledger: Export Controls, Concentration, and Cycle Durability

Geopolitical Exposure: China was ASML’s largest single market in 2025 at roughly a third of revenue; by the first quarter of 2026 China’s share of net system sales had fallen sharply to 19 percent as tightened export restrictions took effect, and further multilateral control legislation is under discussion in Washington. Every major equipment maker carries some version of this exposure, and revenue mix shifts of this magnitude have direct margin and planning consequences.

Demand Concentration: A handful of customers, led by TSMC, Samsung, SK hynix, Micron, and Intel, account for the majority of equipment purchases, and AI-related silicon now drives a disproportionate share of industry revenue against a very small unit base. TSMC’s own leadership has acknowledged the discomfort of committing more than USD 50 billion a year against demand whose durability cannot be guaranteed. A pause in hyperscaler capital spending would transmit to equipment order books within quarters.

Execution Risk in Reshored Capacity: The 20 to 30 percent cost premium on U.S. production, skilled labour scarcity, and supply chain vulnerabilities, from helium disruptions to specialty materials, mean that announced capacity and productive capacity are not the same thing. The reshoring benefit for buyers is concentrated in the 2028 to 2032 window, when today’s construction reaches mature yields.

None of these risks negate the structural case. They do, however, define the difference between participating in the cycle and being positioned for it.

Implications for Executives and Investors

For leadership teams across industrial, technology, financial, and materials businesses, the equipment supercycle carries practical consequences that extend well beyond the semiconductor industry itself.

Suppliers of precision components, vacuum systems, optics, motion control, specialty gases, and cleanroom infrastructure face a multi-year demand runway, but only if they qualify into equipment maker supply chains early and in the right regions. Industrial firms adjacent to fab construction, in power, water treatment, HVAC, and automation, should map the announced project pipeline against their regional capabilities now, because procurement decisions for 2028 capacity are being made in 2026.

Investors should distinguish between cyclical equipment revenue and the growing installed-base service annuity, which at leading toolmakers now approaches a quarter or more of revenue at superior margins and much lower volatility. Corporate strategists in any compute-dependent business should treat equipment order books, ASML’s backlog above all, as forward indicators of compute cost and availability two years out.